![]() This ensures that theīoot vector and BIOS execute off the PCH. Positive decode ensures any overlapping ranges will be ignored. 2 (it is true even in previous generations, AFAIK):įor security reasons, the processor will positively decode this range to DMI. You can find the following map on Chapter 2.6 of the 8th-9th generation datasheet Vol. The CPU doesn't have SPI interface, requests to this window are always redirected to the DMI interface, for security reasons. ![]() ![]() ![]() The first thing a Haswell+ CPU does on power-up (after the BIST - Built-In Self Test) is executing a microcoded routine, part of Intel TXT technology, to fetch the FIT at 4GiB-40h and executes the BIOS ACM (Authenticated Code Module), and eventually continue the measured boot, or the fallback to the legacy reset vector at 4GiB - 10h.Įither way, the CPU needs to fetch instructions from a memory window a few MiB just below 4GiB.
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